Line data Source code
1 : /* SPDX-License-Identifier: GPL-2.0+ */
2 : /*
3 : * Driver for 8250/16550-type serial ports
4 : *
5 : * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 : *
7 : * Copyright (C) 2001 Russell King.
8 : */
9 :
10 : #include <linux/bits.h>
11 : #include <linux/serial_8250.h>
12 : #include <linux/serial_core.h>
13 : #include <linux/dmaengine.h>
14 :
15 : #include "../serial_mctrl_gpio.h"
16 :
17 : struct uart_8250_dma {
18 : int (*tx_dma)(struct uart_8250_port *p);
19 : int (*rx_dma)(struct uart_8250_port *p);
20 : void (*prepare_tx_dma)(struct uart_8250_port *p);
21 : void (*prepare_rx_dma)(struct uart_8250_port *p);
22 :
23 : /* Filter function */
24 : dma_filter_fn fn;
25 : /* Parameter to the filter function */
26 : void *rx_param;
27 : void *tx_param;
28 :
29 : struct dma_slave_config rxconf;
30 : struct dma_slave_config txconf;
31 :
32 : struct dma_chan *rxchan;
33 : struct dma_chan *txchan;
34 :
35 : /* Device address base for DMA operations */
36 : phys_addr_t rx_dma_addr;
37 : phys_addr_t tx_dma_addr;
38 :
39 : /* DMA address of the buffer in memory */
40 : dma_addr_t rx_addr;
41 : dma_addr_t tx_addr;
42 :
43 : dma_cookie_t rx_cookie;
44 : dma_cookie_t tx_cookie;
45 :
46 : void *rx_buf;
47 :
48 : size_t rx_size;
49 : size_t tx_size;
50 :
51 : unsigned char tx_running;
52 : unsigned char tx_err;
53 : unsigned char rx_running;
54 : };
55 :
56 : struct old_serial_port {
57 : unsigned int uart;
58 : unsigned int baud_base;
59 : unsigned int port;
60 : unsigned int irq;
61 : upf_t flags;
62 : unsigned char io_type;
63 : unsigned char __iomem *iomem_base;
64 : unsigned short iomem_reg_shift;
65 : };
66 :
67 : struct serial8250_config {
68 : const char *name;
69 : unsigned short fifo_size;
70 : unsigned short tx_loadsz;
71 : unsigned char fcr;
72 : unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
73 : unsigned int flags;
74 : };
75 :
76 : #define UART_CAP_FIFO BIT(8) /* UART has FIFO */
77 : #define UART_CAP_EFR BIT(9) /* UART has EFR */
78 : #define UART_CAP_SLEEP BIT(10) /* UART has IER sleep */
79 : #define UART_CAP_AFE BIT(11) /* MCR-based hw flow control */
80 : #define UART_CAP_UUE BIT(12) /* UART needs IER bit 6 set (Xscale) */
81 : #define UART_CAP_RTOIE BIT(13) /* UART needs IER bit 4 set (Xscale, Tegra) */
82 : #define UART_CAP_HFIFO BIT(14) /* UART has a "hidden" FIFO */
83 : #define UART_CAP_RPM BIT(15) /* Runtime PM is active while idle */
84 : #define UART_CAP_IRDA BIT(16) /* UART supports IrDA line discipline */
85 : #define UART_CAP_MINI BIT(17) /* Mini UART on BCM283X family lacks:
86 : * STOP PARITY EPAR SPAR WLEN5 WLEN6
87 : */
88 : #define UART_CAP_NOTEMT BIT(18) /* UART without interrupt on TEMT available */
89 :
90 : #define UART_BUG_QUOT BIT(0) /* UART has buggy quot LSB */
91 : #define UART_BUG_TXEN BIT(1) /* UART has buggy TX IIR status */
92 : #define UART_BUG_NOMSR BIT(2) /* UART has buggy MSR status bits (Au1x00) */
93 : #define UART_BUG_THRE BIT(3) /* UART has buggy THRE reassertion */
94 : #define UART_BUG_TXRACE BIT(5) /* UART Tx fails to set remote DR */
95 :
96 : /* Module parameters */
97 : #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
98 :
99 : extern unsigned int nr_uarts;
100 :
101 : #ifdef CONFIG_SERIAL_8250_SHARE_IRQ
102 : #define SERIAL8250_SHARE_IRQS 1
103 : #else
104 : #define SERIAL8250_SHARE_IRQS 0
105 : #endif
106 :
107 : extern unsigned int share_irqs;
108 : extern unsigned int skip_txen_test;
109 :
110 : #define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \
111 : { \
112 : .iobase = _base, \
113 : .irq = _irq, \
114 : .uartclk = 1843200, \
115 : .iotype = UPIO_PORT, \
116 : .flags = UPF_BOOT_AUTOCONF | (_flags), \
117 : }
118 :
119 : #define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
120 :
121 : extern struct uart_driver serial8250_reg;
122 : void serial8250_register_ports(struct uart_driver *drv, struct device *dev);
123 :
124 : /* Legacy ISA bus related APIs */
125 : typedef void (*serial8250_isa_config_fn)(int, struct uart_port *, u32 *);
126 : extern serial8250_isa_config_fn serial8250_isa_config;
127 :
128 : void serial8250_isa_init_ports(void);
129 :
130 : extern struct platform_device *serial8250_isa_devs;
131 :
132 : extern const struct uart_ops *univ8250_port_base_ops;
133 : extern struct uart_ops univ8250_port_ops;
134 :
135 0 : static inline int serial_in(struct uart_8250_port *up, int offset)
136 : {
137 0 : return up->port.serial_in(&up->port, offset);
138 : }
139 :
140 0 : static inline void serial_out(struct uart_8250_port *up, int offset, int value)
141 : {
142 0 : up->port.serial_out(&up->port, offset, value);
143 0 : }
144 :
145 : /**
146 : * serial_lsr_in - Read LSR register and preserve flags across reads
147 : * @up: uart 8250 port
148 : *
149 : * Read LSR register and handle saving non-preserved flags across reads.
150 : * The flags that are not preserved across reads are stored into
151 : * up->lsr_saved_flags.
152 : *
153 : * Returns LSR value or'ed with the preserved flags (if any).
154 : */
155 0 : static inline u16 serial_lsr_in(struct uart_8250_port *up)
156 : {
157 0 : u16 lsr = up->lsr_saved_flags;
158 :
159 0 : lsr |= serial_in(up, UART_LSR);
160 0 : up->lsr_saved_flags = lsr & up->lsr_save_mask;
161 :
162 0 : return lsr;
163 0 : }
164 :
165 : /*
166 : * For the 16C950
167 : */
168 0 : static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
169 : {
170 0 : serial_out(up, UART_SCR, offset);
171 0 : serial_out(up, UART_ICR, value);
172 0 : }
173 :
174 0 : static unsigned int __maybe_unused serial_icr_read(struct uart_8250_port *up,
175 : int offset)
176 : {
177 0 : unsigned int value;
178 :
179 0 : serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
180 0 : serial_out(up, UART_SCR, offset);
181 0 : value = serial_in(up, UART_ICR);
182 0 : serial_icr_write(up, UART_ACR, up->acr);
183 :
184 0 : return value;
185 0 : }
186 :
187 : void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
188 :
189 0 : static inline u32 serial_dl_read(struct uart_8250_port *up)
190 : {
191 0 : return up->dl_read(up);
192 : }
193 :
194 0 : static inline void serial_dl_write(struct uart_8250_port *up, u32 value)
195 : {
196 0 : up->dl_write(up, value);
197 0 : }
198 :
199 0 : static inline bool serial8250_set_THRI(struct uart_8250_port *up)
200 : {
201 : /* Port locked to synchronize UART_IER access against the console. */
202 0 : lockdep_assert_held_once(&up->port.lock);
203 :
204 0 : if (up->ier & UART_IER_THRI)
205 0 : return false;
206 0 : up->ier |= UART_IER_THRI;
207 0 : serial_out(up, UART_IER, up->ier);
208 0 : return true;
209 0 : }
210 :
211 0 : static inline bool serial8250_clear_THRI(struct uart_8250_port *up)
212 : {
213 : /* Port locked to synchronize UART_IER access against the console. */
214 0 : lockdep_assert_held_once(&up->port.lock);
215 :
216 0 : if (!(up->ier & UART_IER_THRI))
217 0 : return false;
218 0 : up->ier &= ~UART_IER_THRI;
219 0 : serial_out(up, UART_IER, up->ier);
220 0 : return true;
221 0 : }
222 :
223 : struct uart_8250_port *serial8250_setup_port(int index);
224 : struct uart_8250_port *serial8250_get_port(int line);
225 :
226 : int serial8250_em485_config(struct uart_port *port, struct ktermios *termios,
227 : struct serial_rs485 *rs485);
228 : void serial8250_em485_start_tx(struct uart_8250_port *p, bool toggle_ier);
229 : void serial8250_em485_stop_tx(struct uart_8250_port *p, bool toggle_ier);
230 : void serial8250_em485_destroy(struct uart_8250_port *p);
231 : extern struct serial_rs485 serial8250_em485_supported;
232 :
233 : /* MCR <-> TIOCM conversion */
234 0 : static inline int serial8250_TIOCM_to_MCR(int tiocm)
235 : {
236 0 : int mcr = 0;
237 :
238 0 : if (tiocm & TIOCM_RTS)
239 0 : mcr |= UART_MCR_RTS;
240 0 : if (tiocm & TIOCM_DTR)
241 0 : mcr |= UART_MCR_DTR;
242 0 : if (tiocm & TIOCM_OUT1)
243 0 : mcr |= UART_MCR_OUT1;
244 0 : if (tiocm & TIOCM_OUT2)
245 0 : mcr |= UART_MCR_OUT2;
246 0 : if (tiocm & TIOCM_LOOP)
247 0 : mcr |= UART_MCR_LOOP;
248 :
249 0 : return mcr;
250 0 : }
251 :
252 0 : static inline int serial8250_MCR_to_TIOCM(int mcr)
253 : {
254 0 : int tiocm = 0;
255 :
256 0 : if (mcr & UART_MCR_RTS)
257 0 : tiocm |= TIOCM_RTS;
258 0 : if (mcr & UART_MCR_DTR)
259 0 : tiocm |= TIOCM_DTR;
260 0 : if (mcr & UART_MCR_OUT1)
261 0 : tiocm |= TIOCM_OUT1;
262 0 : if (mcr & UART_MCR_OUT2)
263 0 : tiocm |= TIOCM_OUT2;
264 0 : if (mcr & UART_MCR_LOOP)
265 0 : tiocm |= TIOCM_LOOP;
266 :
267 0 : return tiocm;
268 0 : }
269 :
270 : /* MSR <-> TIOCM conversion */
271 0 : static inline int serial8250_MSR_to_TIOCM(int msr)
272 : {
273 0 : int tiocm = 0;
274 :
275 0 : if (msr & UART_MSR_DCD)
276 0 : tiocm |= TIOCM_CAR;
277 0 : if (msr & UART_MSR_RI)
278 0 : tiocm |= TIOCM_RNG;
279 0 : if (msr & UART_MSR_DSR)
280 0 : tiocm |= TIOCM_DSR;
281 0 : if (msr & UART_MSR_CTS)
282 0 : tiocm |= TIOCM_CTS;
283 :
284 0 : return tiocm;
285 0 : }
286 :
287 0 : static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
288 : {
289 0 : serial_out(up, UART_MCR, value);
290 :
291 0 : if (up->gpios)
292 0 : mctrl_gpio_set(up->gpios, serial8250_MCR_to_TIOCM(value));
293 0 : }
294 :
295 0 : static inline int serial8250_in_MCR(struct uart_8250_port *up)
296 : {
297 0 : int mctrl;
298 :
299 0 : mctrl = serial_in(up, UART_MCR);
300 :
301 0 : if (up->gpios) {
302 0 : unsigned int mctrl_gpio = 0;
303 :
304 0 : mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
305 0 : mctrl |= serial8250_TIOCM_to_MCR(mctrl_gpio);
306 0 : }
307 :
308 0 : return mctrl;
309 0 : }
310 :
311 : #ifdef CONFIG_SERIAL_8250_PNP
312 : int serial8250_pnp_init(void);
313 : void serial8250_pnp_exit(void);
314 : #else
315 : static inline int serial8250_pnp_init(void) { return 0; }
316 : static inline void serial8250_pnp_exit(void) { }
317 : #endif
318 :
319 : #ifdef CONFIG_SERIAL_8250_RSA
320 : void univ8250_rsa_support(struct uart_ops *ops);
321 : void rsa_enable(struct uart_8250_port *up);
322 : void rsa_disable(struct uart_8250_port *up);
323 : void rsa_autoconfig(struct uart_8250_port *up);
324 : void rsa_reset(struct uart_8250_port *up);
325 : #else
326 : static inline void univ8250_rsa_support(struct uart_ops *ops) { }
327 : static inline void rsa_enable(struct uart_8250_port *up) {}
328 : static inline void rsa_disable(struct uart_8250_port *up) {}
329 : static inline void rsa_autoconfig(struct uart_8250_port *up) {}
330 : static inline void rsa_reset(struct uart_8250_port *up) {}
331 : #endif
332 :
333 : #ifdef CONFIG_SERIAL_8250_FINTEK
334 : int fintek_8250_probe(struct uart_8250_port *uart);
335 : #else
336 0 : static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
337 : #endif
338 :
339 : #ifdef CONFIG_ARCH_OMAP1
340 : #include <linux/soc/ti/omap1-soc.h>
341 : static inline int is_omap1_8250(struct uart_8250_port *pt)
342 : {
343 : int res;
344 :
345 : switch (pt->port.mapbase) {
346 : case OMAP1_UART1_BASE:
347 : case OMAP1_UART2_BASE:
348 : case OMAP1_UART3_BASE:
349 : res = 1;
350 : break;
351 : default:
352 : res = 0;
353 : break;
354 : }
355 :
356 : return res;
357 : }
358 :
359 : static inline int is_omap1510_8250(struct uart_8250_port *pt)
360 : {
361 : if (!cpu_is_omap1510())
362 : return 0;
363 :
364 : return is_omap1_8250(pt);
365 : }
366 : #else
367 0 : static inline int is_omap1_8250(struct uart_8250_port *pt)
368 : {
369 0 : return 0;
370 : }
371 0 : static inline int is_omap1510_8250(struct uart_8250_port *pt)
372 : {
373 0 : return 0;
374 : }
375 : #endif
376 :
377 : #ifdef CONFIG_SERIAL_8250_DMA
378 : extern int serial8250_tx_dma(struct uart_8250_port *);
379 : extern void serial8250_tx_dma_flush(struct uart_8250_port *);
380 : extern int serial8250_rx_dma(struct uart_8250_port *);
381 : extern void serial8250_rx_dma_flush(struct uart_8250_port *);
382 : extern int serial8250_request_dma(struct uart_8250_port *);
383 : extern void serial8250_release_dma(struct uart_8250_port *);
384 :
385 0 : static inline void serial8250_do_prepare_tx_dma(struct uart_8250_port *p)
386 : {
387 0 : struct uart_8250_dma *dma = p->dma;
388 :
389 0 : if (dma->prepare_tx_dma)
390 0 : dma->prepare_tx_dma(p);
391 0 : }
392 :
393 0 : static inline void serial8250_do_prepare_rx_dma(struct uart_8250_port *p)
394 : {
395 0 : struct uart_8250_dma *dma = p->dma;
396 :
397 0 : if (dma->prepare_rx_dma)
398 0 : dma->prepare_rx_dma(p);
399 0 : }
400 :
401 0 : static inline bool serial8250_tx_dma_running(struct uart_8250_port *p)
402 : {
403 0 : struct uart_8250_dma *dma = p->dma;
404 :
405 0 : return dma && dma->tx_running;
406 0 : }
407 : #else
408 : static inline int serial8250_tx_dma(struct uart_8250_port *p)
409 : {
410 : return -1;
411 : }
412 : static inline void serial8250_tx_dma_flush(struct uart_8250_port *p) { }
413 : static inline int serial8250_rx_dma(struct uart_8250_port *p)
414 : {
415 : return -1;
416 : }
417 : static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
418 : static inline int serial8250_request_dma(struct uart_8250_port *p)
419 : {
420 : return -1;
421 : }
422 : static inline void serial8250_release_dma(struct uart_8250_port *p) { }
423 :
424 : static inline bool serial8250_tx_dma_running(struct uart_8250_port *p)
425 : {
426 : return false;
427 : }
428 : #endif
429 :
430 0 : static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
431 : {
432 0 : unsigned char status;
433 :
434 0 : status = serial_in(up, 0x04); /* EXCR2 */
435 : #define PRESL(x) ((x) & 0x30)
436 0 : if (PRESL(status) == 0x10) {
437 : /* already in high speed mode */
438 0 : return 0;
439 : } else {
440 0 : status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
441 0 : status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
442 0 : serial_out(up, 0x04, status);
443 : }
444 0 : return 1;
445 0 : }
446 :
447 : static inline int serial_index(struct uart_port *port)
448 : {
449 : return port->minor - 64;
450 : }
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